Khalil-Hani, M., and N. Shaikh-Husin. “An Optimization Algorithm Based On Grid-Graphs For Minimizing Interconnect Delay In VLSI Layout Design”. Malaysian Journal of Computer Science, vol. 22, no. 1, June 2009, pp. 19-33, https://juku.um.edu.my/index.php/MJCS/article/view/6351.